Success Stories

• Read how Fujitsu switched from ICT to an easy-to-use boundary-scan test and programming system which resulted in savings exceeding $500,000 in little more than a year.

• Read how boundary-scan parallel test and programming cuts costs and simplifies production of high-volume telephony products at Zultys.

• Read how the Corelis Scan Library and CodeRunner Debugger enabled easy development of custom JTAG tools to simplify programming and debug of a RAD750 computer at BAE Systems.

• Read how Corelis Boundary-Scan test products solve difficult prototype problems at Vanguard Managed Solutions, saving countless hours of non-productive debug work.

• Read how Corelis Boundary-Scan technology facilitated Applied Data Systems' customization of embedded systems and streamlined ISO 9001 certification.

• Read how Corelis JTAG tools helped streamline production throughput while reducing development cost at Spectral Systems (SSI) by testing prototype boards before the designs were even functional.

• Read how Corelis JTAG tools helped streamline production throughput while reducing development cost at Navman NZ Ltd.

• Read how Corelis JTAG tools provided real benefits for Ixia in testing Double-Data Rate SDRAM memories through Xilinx Vertex FPGAs.

• Read how Corelis JTAG tools helped maintain test engineer’s sanity while increasing throughput and reducing cost at Imperial Technology Inc.

• Read how 2Wire Corporation Significantly Reduced Time-to-Market Schedule by Pushing Corelis Boundary-Scan Technology to its Limits.

• Read how Smartbits Systems (a division of Spirent Communications) dramatically increased production yields with use of Corelis’ ScanPlus Boundary-Scan Tester.

• Read how Daresbury Laboratory in the U.K. keeps Rapid2 project on track and tests boards with 30,000 nets in seconds.

Fujitsu Switches from ICT to Easy-to-Use Boundary-Scan Test
and Programming System Resulting in Savings Exceeding
$500,000 in Little More Than a Year

It was the high cost and long lead times for building In-Circuit Test (ICT) equipment that sent Mark Cooper, senior test engineer at Fujitsu, looking for circuit board testing alternatives. Production volumes of the company’s FLASHWAVE 4100 high-speed optical communications access device were substantial, but not enough to justify the $25,000 to $40,000 cost of an ICT test fixture and program for each type of board that required testing. The FLASHWAVE 4100 hardware configuration (See Figure 1) is a multi-slot “shelf” that accommodates up to 15 circuit boards, all interconnected through a common backplane. The boards perform a variety of functions from network control to multiplexing to interfacing for traditional SONET or multiple Ethernet LAN services, so there are 12 different card types, presenting Cooper with a complex manufacturing test operation combining fairly low volumes, but many different configurations. In addition, the cards themselves are complex - some double-sided - with a variety of programmable flash and CPLDs that need custom programming.

Figure 1. FLASHWAVE 4100 Multiservice Optical Access Solution

"We had been using ICT for our board test, but we were finding that we didn’t have the volumes to justify up to $40,000 for a program and fixture for each board when we were running only 100 boards through test in a year" said Cooper. "So that’s when we started looking at other options, and that’s when we ran across boundary scan." Cooper reviewed vendors and was able to run trials with a few systems. His objective was to identify the system that was the easiest to learn and use, in terms of test development and debug, and yet powerful enough to test his complex boards. With that in mind, he chose the Corelis ScanPlus system with the ScanExpress Test Program Generator.

"It had a nice top-down flow. The wizards help when you first get started and the software tells you exactly what parameters it needs and the way it goes to generate the test program" said Cooper. "But in addition to testing, the system also allows us to fully program the devices on the cards, all in one cycle at one test station for a number of different combinations of flash and CPLDs."

Test System Overview

Each test station interfaces to boundary scan (JTAG) test controller hardware hosted by a PC. Fujitsu chose the internal PCI-1149.1/Turbo interface card. A cable (up to 30 feet in length) connects to an access pod called the ScanTAP-4, that includes four test access port interfaces as shown in Figure 2. Fujitsu host application, invokes ScanPlus Runner software that runs the test plan and displays status and results on the PC. See Figure 3.

Figure 2. Corelis PCI-1149.1/Turbo JTAG Controller

Test vectors, in the form of Compact Vector Format (CVF) files, generated using ScanExpressTPG (test program generator), can be automatically executed and the results displayed and logged to a file. The system also supports other formats such as SVF, JAM, STAPL, and J-Drive. Test engineers can construct different test plans for different Units Under Test (UUTs) and reorder, enable, or disable tests within a test plan. An unlimited number of different tests can be combined into a test plan.

Figure 3. Host application displays ScanPlus Runner test results

Hardware, Labor and Lead Time Savings Quickly Add Up to Hundreds of Thousands of Dollars

Where Cooper once had to fund, build and staff an ICT station for each different card, he has consolidated his test operation to five test stations run by himself and one other person. Where he once had to put up with long lead times just to get a new ICT fixture and program built, he can now get ready to test a new card in a matter of hours. Since implementing the boundary scan test and programming system, Cooper has benefited from a range of savings that easily add up to an enormous return on the $175,000 total investment he has made in boundary scan:

• Since first using the system in October, 2004 he estimates his savings at nearly $400,000 just in test fixtures and test program costs alone.

• Labor costs are cut because each ICT station required its own operator to "baby sit" the test in progress and reconfigure the station for different card specifications. By reducing staff from 12 to two, Cooper estimates $20,000 a month in savings from reduced labor costs. He has also connected the test system to lights that the ScanExpress software controls. Green (pass), yellow (need operator) and red (failure) lights let the operator know if any board tests need attention, so one person can operate half a dozen boundary scan stations.

• Far shorter lead times are needed to put new boards into production. Designing and building up a new ICT, test fixture and program typically took six-weeks. "With Corelis I can have a programming file developed, along with a full debug and test program in half a day. With that in place the whole test goes so smoothly" Cooper says.

• Test operators require less time to change from testing one configuration of a card to another compared to the manual process the ICT operators had to go through. Each change on the ICT stations meant manually changes to a number of specifications on the fixture and jumpers changes to fit the test points of different cards. "We have boards that would take an hour and a-half to get all that done. And we had to do it through a bus structure that added time, rather than directly as we do now with boundary scan" Cooper said. "So we save money that way in an amount that I can’t even quantify."

Important Tip for Implementing Boundary Scan

Cooper offers an important tip for making the transition to boundary scan testing. Copper suggests being open to design changes in your circuit cards that facilitate boundary scan testing and programming. A number of refinements in the design of the Fujitsu cards helped Cooper maximize the potential of his new system, "Corelis supplied a number of design recommendations and we immediately started giving that information back to our design guys and implementing the changes. Once we got our engineering team to buy into our design changes, things could not have gone smoother."

More Value Waiting to Be Found

Cooper wants to further simplify his test stations by integrating the boundary scan connection into the backplane of the test shelf. The development will include emulating the Corelis boundary scan header, then tapping into unused pins in the backplane to bring the right signals, in the right states to reach the CPLDs, EPROMs and other devices on the board, and control the programming and test functions. He expects to complete the development in the next six months. The result will be an even easier hookup of devices under test, with a single connection to the test shelf, rather than plugging them into the shelf and then attaching another cable from the boundary scan test access port (TAP) to a separate boundary scan interface. Besides the tremendous cost savings, Cooper is meeting his ultimate goal: cutting the test time for his products to the bare minimum. "In this business it’s all about reduced handling, and improving throughput" Cooper sums up. "I don’t have to go out to the floor anymore to resolve false failure issues, and we don’t have a lot of intermittent issues like we did with ICT. I like that."

Corelis Scan Library and CodeRunner Enable Easy Development
 of Custom JTAG Tools to Simplify Programming and Debug of RAD750 Computer

The RAD750®, developed by BAE Systems, is a licensed, radiation-hardened version of the PowerPC 750®. The RAD750 design objectives were focused on cutting power consumption, weight and cost; key attributes in designing products for space flight. Those objectives were accomplished through an architecture that increases processing speeds to an industry-leading 240 million instructions per second (MIPS) and operates at speeds of 133 MHz and greater, reducing the number of processors required. The RAD750 advanced architecture and processing throughput – ten times the performance of current space processors, according to BAE Systems – will allow a new generation of high-performance satellite payloads to solve more intensive computing problems, such as deep space navigation, precise trajectory adjustments to position spacecraft for flybys, altitude control, landing, and exploration operations.

The RAD750 is available on the three rack-unit CompactPCI Space Flight Computer (SFC), developed under contract to NASA's Jet Propulsion Laboratory (JPL). BAE Systems has sold hundreds of the SFCs to the aerospace community.

Mars Mission is a Featured Application

BAE Systems and Customers Seek an Easy Way to Program RAD750 EEPROM

Many customers using the RAD750 boot the computer from EEPROM and BAE Systems wanted them to have a simple way to load, reload, and debug software on the computer. JTAG was the right technology, but there was a gap in the link to the programming process.

"The JTAG connection to the Power PCI bridge chip on the product provided a path to the EEPROM, but no tools existed. We developed custom tools built on the Corelis Scan Function Library to get it done" said Craig Hatfield, systems engineer for BAE Systems. "We also developed additional debug utilities to provide visibility into the system without the need for any onboard software. These utilities are helpful when integrating new hardware on or attached to the computer."

Hatfield had the tools ready prior to release of the RAD750 product, giving customers the required low-level interface for a complete, simplified way to program the EEPROM.

"We chose the Corelis CodeRunner JTAG emulator over other in-circuit emulators for PowerPCs because we also needed a JTAG communication path to our support chips. The emulator and Scan Function Library are able to use the same adapter and buffer, providing both interfaces in one package" said Hatfield. "That’s a benefit to our customers because they can buy only one product and get a RAD750 debugger as well as visibility into our bridge devices."

Savings result from the combined emulator/debugger interface because without the shared JTAG libraries, BAE Systems and its customers would have to purchase two JTAG systems, one for the PowerPC (RAD750) and another for the bridge chip (Power PCI).  A set of JTAG tools like BAE Systems is using costs $5,000 to $10,000, and the savings are multiplied with each test station created.

The Scan Function Library (SFL) is a set of software drivers, coded in "C" and provided as a 32-bit DLL for Windows 2000/XP. The software drivers enable users to operate the JTAG port and send JTAG instructions and data to the target system. Users can incorporate the drivers in their own application software and need to code only the higher level test procedures. Sample routines in the library include flushing data out of and reading data into registers, reading the logical values of I/O pins, scanning data out of devices, and setting TCK speeds for JTAG operations.

CodeRunner

Corelis’ CodeRunner debugger is a JTAG-based emulation tool. CodeRunner effectively partitions the individual processor’s hardware and software resources into a multi-windowed environment that provides for ultimate clarity, increasing productivity in the areas of board bring up, driver/firmware development, and software application debugging.

The CodeRunner Debugger offers many advanced features, reaching far beyond the robust "run-start-stop" control that has made JTAG based debuggers so popular. In addition to its many breakpoint facilities, CodeRunner offers an extensive macro and scripting capability and can interpret command files written in a structured "C"-like language. CodeRunner works with all popular C/C++ cross-compilers that generate DWARF, ELF, or Stabs debug information, allowing for the greatest flexibility and cost reduction when selecting development tools. Corelis JTAG emulators are available with PCI, PCMCIA, USB 2.0, Parallel Port and Ethernet JTAG controllers, to provide flexibility when designing host and target environments.

Summary

With the simple development of its custom debugging and programming tools based on the Corelis SFL, BAE Systems is able to provide a complete hardware and software development platform for its exacting aerospace customers.

"CodeRunner is a welcome addition to the tool suite. So far, it has performed admirably" Hatfield says. "Corelis built an interface box with both Common On-Chip Processor (COP) and TAP connections, and the software was updated to add parity to the 60X bus accesses as required by the Power PCI.  The Corelis people have been very helpful and responsive in providing the right tool for our job."

About BAE Systems

BAE Systems has a 20-year history of providing radiation-hardened solutions for U.S. space programs. Its RAD6000 computers were installed on each of the still-broadcasting Mars Rovers – the only control and data computers aboard the two Rovers – to execute flight, landing and exploration operations on that planet. The RAD750 represents the next-generation of space microprocessors and were vital in NASA’s Deep Impact mission. NASA's program managers are investigating future options for the Deep Impact flyby spacecraft, which is on a trajectory to fly past Earth in late December 2007.

Corelis’ Boundary-Scan Test Products Solve Difficult Prototype
Problems at Vanguard Managed Solutions, Saving Countless
Hours of Non-Productive Debug Work

Vanguard Managed Solutions (VanguardMS) has been designing, developing, and deploying innovative and cost-effective networking solutions for over 40 years. During that period VanguardMS has established an enviable track record by focusing on “time-to-market” as the most critical element in successfully delivering complete managed-network solutions to meet the needs of its hundreds of customers around the world. In recent years VanguardMS has relied on Corelis’ ScanPlus Boundary-Scan test systems to shorten its development cycles and bring new products to market sooner by improving the productivity of its engineers in the development and debugging of prototype units.

Scott Dextradeur is an MS Production Test Engineer at VanguardMS whose responsibilities include the testing of production-run assemblies. An exceptional case was recently presented to Scott when a group of R&D engineers came to him urgently requesting help to “bring-up” a CPU-based prototype board. The initial problem with the bring-up of the prototype board was that the CPU would not properly boot. As all test and development engineers know from first-hand experience this phase of board prototyping can be both frustrating and time consuming. Scott immediately connected the prototype to his Corelis ScanPlus system and ran Corelis’ Boundary-Scan tests. Immediately the ScanPlus found a pull-down resistor net shorted to power.  When Scott informed the R&D engineers of the short, they attempted to inspect the board with a microscope but were unable to visually identify the short. Trusting that the Corelis ScanPlus system is able to detect electrical faults that are not visible to the trained eye, even under a microscope, the engineers decided to replace the resistor. The prototype booted, the error was corrected, and the R&D engineers were able to quickly move forward with their development work.

Vanguard Multi-Service  Access Routers

Later, the R&D engineers returned to Scott with another difficult problem. This time the SDRAM on the prototype was functioning erratically.  Using his Corelis’ ScanPlus tools Scott quickly ran a memory cluster test that located a bad memory cell. In this case, the results of the test indicated that the failure was due not to an assembly defect but to a bad memory component. Initially Scott was reluctant to replace the critical memory component and decided first to contact the Corelis customer support group to gain a better understanding of exactly how a memory cluster test is accomplished.  After receiving a timely and unambiguous response, Scott realized that the only probable cause for the failure was the bad memory component, as indicated by the ScanPlus system. When the failing memory component was replaced, the failure disappeared. Once again the timely use of Corelis tools removed a roadblock that was preventing the R&D engineers from moving forward with their prototype development.

 “Once our R&D engineers had experienced the success of using the Corelis tools to find quick solutions to tough problems that blocked their development progress, they became very enthusiastic about utilizing boundary-scan to an even greater extent in future designs”, said Scott Dextradeur. “The real clincher for us was when we were able to use the ScanPlus to detect a solder short under a BGA device which our contract manufacture had earlier examined with an x-ray but failed to find. Only after we detected the exact location of the fault using boundary-scan was the CM able to retest the board with x-ray and confirm the solder smear.”

 “It’s foreseen that the development schedules at VanguardMS will remain tight throughout the end of the year” continued Dextradeur. “The R&D engineers are more than happy to discover a tool, such as the Corelis ScanPlus system, that can help keep them from spending nights and weekends tracking down these kinds of difficult board bring-up problems. Our engineers confirmed that the defects they found on this prototype board are exactly the kinds of faults that are extremely difficult and time-consuming to find by traditional means. The added cost and time incurred from testing with conventional tools could mean missing a narrow window-of-opportunity to market a new and leading product, something that Vanguard Managed Solutions cannot concede to.”
 

Corelis’ Boundary-Scan Technology Facilitates Applied Data Systems’
Customization of Embedded Systems and Streamlines ISO 9001 Certification

Applied Data Systems (www.applieddata.net) is the leading supplier of “application-ready” RISC-based single board embedded systems with flat panel displays for customers who need XScale or StrongARM-based systems running Windows CE, Linux or the operating system of choice. Nearly half of the company’s customer production designs are completely customized.

 “We call ourselves a delicatessen,” jokes Bob Olsen, president of the company, “because we try to accommodate every customer’s preferences.”

“Because the ScanPlus tool is automated, it is preventing configuration errors and eliminating human errors,” explained Anthony. “During our prototype stage, we can streamline to production more effectively, and our initial testing involves less ‘stop-and-start’ checking by the entire engineering team.”

Anthony has since pushed Corelis ScanPlus tools even further by designing his own test fixture allowing testing and in-system programming of 4 boards simultaneously with the Corelis ScanTAP-4 module.  He included extra boundary-scan logic on the fixture to test the connector interfaces on the target boards.

“Once the Corelis unit was here, we’re finding more uses than the original justification,” explained Anthony.  “Our engineers are coming back to the testing area with miscellaneous testing requests that are very easy to do now. We were not able to do these miscellaneous projects as smoothly and easily before. The Corelis ScanPlus system has become invaluable for us, especially with all of our custom work and designs. Unusual problems become irrelevant because the Corelis system easily compensates for these unusual configurations making testing simple. We have been very pleased with the Corelis system. It has delivered even more than we expected.”

Applied Data Systems recently went through their ISO 9001 certification, and the Corelis testing was very beneficial throughout the entire process. Anthony was able to test the entire ISO process, one system at a time in a more accurate way.

Boundary-scan Tools from Corelis reduce development cost
at Spectral Systems, Inc. (SSI) by testing prototype boards
 before the designs are even functional

Spectral Systems, Inc. (SSI) is a leading-edge aerospace engineering and product development company located in southwestern Ohio, the birthplace of manned flight. SSI was founded in 1995 and has grown very rapidly from an engineering service provider to a developer and integrator of advanced Intelligence, Surveillance and Reconnaissance (ISR) and Electronic Warfare (EW) systems, sensors and embedded processors.

Ben Steele is a program manager at Spectral Systems responsible for the design and development of state-of-the-art, multi-channel, multi-function digital receiver subsystems. Ben came to Corelis looking for a more effective method for bringing up complex prototype assemblies. The diminishing access of test points on these complex board assemblies, due to fine pitch components and restrictive packaging types such as BGA, often prevented the use of traditional probing methods and was making board bring-up a costly and time consuming process.

Design engineers are often faced with a confounding problem when bringing up new prototype assemblies. Detecting a manufacturing defect before a design has been verified as “functional” can be a frustrating task. When this problem is multiplied by the inability to access crucial test points then the initial debug process can become a huge bottleneck that slips the entire development schedule. Aware of these potential pitfalls, Ben was seeking for a more effective solution to help streamline this initial debug process.

Using the Corelis boundary scan system, SSI was able to create test vectors and have a test plan in place prior to receiving their first prototype boards from assembly. When the boards arrived, they connected the Corelis boundary scan equipment to their prototype boards through a single ribbon cable to a header connector on their target boards. Before their embedded processor fetched its first opcode, they were able to execute a complete board level interconnect test, test on-board memory devices, program CPLDs and Flash memory devices, and test system logic clusters.

“The Corelis boundary scan equipment we purchased has been extremely helpful in getting our boards up and running. We've been able to identify manufacturing defects and have them repaired prior to trying to make the board functional. I'm sure this has saved countless troubleshooting hours”, said Ben Steele, “We had spent several weeks working on a previous board to find the defects which could have been detected right away with the Corelis boundary scan equipment. We are very pleased with the Corelis Tools and their ease of use.”

Corelis Boundary-Scan Tools Help Streamline Production Throughput
while Reducing Development Cost at Navman NZ Ltd.

Navman is a leading manufacturer of world-class marine electronics and Global Positioning System (GPS) technology. Established in 1988, the New Zealand based company provides a diverse range of navigation technologies across wide ranging industries.

Terry Dagnin is the lead test engineer at Navman and is responsible for Inspection, Test, and Test Engineering. Terry came to Corelis looking for test solutions that are capable of probing areas of printed circuit board assemblies that are difficult to access due to fine pitch components such as Ball Grid Array (BGA) devices.

The design and test engineers at Navman were under a deadline to introduce their iCN 630 portable in-vehicle navigation product to market and announce it at the 2003 International Consumer Electronics Show. Navman’s first pilot production run was 1,000 units. Testing and very fast in-system programming were critical for on schedule delivery.

Navman’s existing test strategies for other products used a combination of functional testing and traditional probing. Central to this approach is the fact that the target CPU must be capable of booting properly and executing the functional test software correctly. If the CPU fails to boot, or the functional test software fails to execute in its entirety, the complete test scenario can quickly be ground to a halt. When the CPU is implemented in a BGA package type, the ability to identify the underlying fault which is preventing the CPU from correctly booting or executing the functional test program can become an exhausting and time consuming effort. This is precisely the situation faced at Navman.

In minimal time, Corelis provided a turn-key solution that included the ScanPlus boundary-scan test system and a custom test procedure.

Corelis Engineers quickly produced a detailed test plan that provided complete coverage of the communication path between the target CPU, and Flash, SRAM and SDRAM memories. Boundary-scan Test Vectors were automatically created by the ScanPlus system and provided excellent test coverage, capable of detecting assembly faults right down to the net and pin level. These faults included bridge faults and opens under the BGA which were inaccessible to traditional probing. The advanced memory diagnostics provided by the ScanPlus system allowed Navman engineers to pin-point faults between the CPU and target memory, allowing us to quickly bring these units up into functionality.

The test engineers at Navman were pleasantly surprised by the ease in which they could accomplish this by simply linking the Corelis ScanPlus DLL interface to their Delphi based software package.

“Our boards are designed with a mixture of digital and analog components and require fast programming of flash memories in-system.” said Mr. Dagnin. “We initially had a certain level of skepticism as to whether boundary-scan would be beneficial for our particular design. We were delighted to find that the boards which passed the boundary-scan testing were directly seen to boot properly and run the functional test programs in their entirety, getting us past the largest bottleneck in our testing process. We were also pleased to see that we could program our flash devices in-circuit very fast by simply including the programming step within the total test plan.

 “We were very impressed with the technical support that we received from Corelis engineers,” added Mr. Dagnin. “Even though we were thousands of miles away, with our site in New Zealand and Corelis in the USA, the direct access that we were given to their engineering staff and the promptness of their feedback made it seem as though Corelis was right here at our facility.”

Navman was so pleased with the added value of boundary-scan and Corelis’ ScanPlus boundary-scan test tools that they decided to incorporate the ScanPlus system into their complete factory-based test software platform to be used for all new product designs.

Corelis JTAG tools provided real benefits for Ixia in testing Double-Data
Rate SDRAM memories through Xilinx VertexE FPGAs

Located in Calabasas, California, Ixia is a leading developer of sophisticated optical and electrical network traffic performance analysis solutions. Mr. Xinchen Wang, Hardware Engineer at Ixia, is responsible for JTAG testing and verification for one of Ixia’s new interface load modules. 

According to Xinchen Wang, to achieve increased net coverage through JTAG testing for Ixia’s new traffic generation and analysis tool, it is important to first verify that all the FPGA’s external Double Data Rate (DDR) SDRAM connections are properly placed and functioning correctly to aide in further design troubleshooting. 

Corelis proposed a ScanPlus solution tailored to meet Ixia’s requirements.  Corelis provided a PCI 1149.1 JTAG controller with a pre-verified DDR SDRAM testing software package with some minor updates to generate memory-testing vectors through JTAG compatible Xilinx FPGAs. The generated vectors successfully tested the interconnects between the FPGAs and the connections to the DDR SDRAM; and furthermore, verified the general functionality of the memory device according to its own published specifications.    

Xinchen Wang puts it this way, “The Corelis ScanPlus boundary-scan interconnect tester is also a highly effective memory test suite that allowed us to reduce prototype debug time and improve our time-to-market. The Corelis technical support team was extremely helpful and committed to helping IXIA meet its project dead-line.”

Corelis JTAG Tools Help Maintain Test Engineer's Sanity While Increasing
Throughput and Reducing Cost at Imperial Technology Inc.

“A large, double sided, very complex PC board assembly was being tested in a “hot mock-up” and was consuming seven Test Engineer hours to test, troubleshoot, and repair. This required that a high level Test Engineer be dedicated to this testing function. The repetitious testing strained his sanity and added considerable cost to the process,” said Bruce C. Johnson.

Bruce is the Quality Assurance Manager at Imperial Technology and is responsible for Inspection, Test, and Test Engineering.  Imperial Technology, located in El Segundo, California, designs and manufactures state of the art high speed, solid state disk drive memories.

In minimal time, Corelis provided a turn-key solution that included the ScanPlus boundary-scan test system and a custom test procedure.

“Corelis Engineers quickly became knowledgeable with our product and efficiently generated Test Vectors with excellent test coverage. Source inspection, which included inserting many faults, was performed at the Corelis facility and successfully accomplished in a speedy and cooperative manner. Test coverage was as quoted and fault locations were well displayed. On-site training was also provided to our Test Engineer.”

“Our board was not particularly designed with boundary scan in mind, however test results were most gratifying” said Mr. Johnson. “All accessible failing nodes were easily identified leading to faulty parts or the failure cause. The majority of boards which passed the boundary test also passed functional testing in the hot mock-up. We are now using technicians to perform the testing and fault location using the Corelis solution, freeing the Test Engineer to perform more demanding tasks.”

 “We were so pleased with the results,” added Mr. Johnson, “that we proceeded with Corelis to perform test vectors generation for two additional boards which incorporated BGA parts and a multitude of FPGA parts. Source acceptance testing located faults which the designing engineer had, unsuccessfully, devoted weeks to locate. Boards which tested GOOD using boundary scan performed 100% in subsequent system functional tests. The Corelis Boundary Scan solution has saved a substantial investment in Test Engineer and test fixturing resources. These valuable resources may now be utilized in more productive and satisfying applications.”

Mr. Johnson was so pleased with the effectiveness of boundary-scan and Corelis boundary-scan test tools, that he is incorporating boundary-scan  testability into all new product designs at Imperial Technology.

2Wire Corporation Significantly Reduces Time-to-Market Schedule by
Pushing Corelis Boundary-Scan Technology to its Limits

2Wire, Inc. delivers a full suite of broadband products and services to the residential marketplace. The 2Wire HomePortal™ family of products are the first intelligent residential gateways to integrate the wealth of options available through the Internet and create a complete home data, voice, and entertainment network.

An enormous product development and testing challenge faced 2Wire, a Silicon Valley start-up specializing in producing broadband residential gateways for the consumer market. “We committed to an extremely aggressive time-to-market schedule,” says Bill Schimandle, senior test engineer for 2Wire,“ which required us to develop new strategies in software development, board prototyping, hardware bring up, and production testing”. 

To answer these technical challenges, 2wire turned to Corelis, an industry leader in JTAG tools and technology. The Corelis boundary-scan test tools allowed 2Wire to quickly debug and bring up target hardware, based on extremely high pin-count BGA packages, without any on-board functional or application code.

With the technical help provided by Corelis’ team of engineers, and utilizing Corelis’ JTAG emulation technology, 2wire was able to develop a JTAG communications protocol for their on-board processor. The on-board processor included a JTAG debug port, which eliminated the need to place RS-232 capability on the board. The tools developed were then used by software engineers to not only prove basic hardware sanity, but to download code either to the onboard non-volatile memory or directly to the processors SDRAM. Using the JTAG on-chip debug capability, streamlined the software teams workload, and allowed them to quickly proceed to developing software on target hardware, instead of the industry standard of modeling first, hardware second.

The next big challenge facing 2Wire was ramping to production in an offshore factory environment. With the constant changes required by rapid prototype development, an ICT program was out of the question if production schedules were to be maintained. The Corelis boundary-scan tools provided the answer again. Bill Schimandle states, “We had a board change forced by FCC compliance testing and we were able to depend on Corelis’ engineering team to provide new test vectors for the board while we were in the process of actually building it. Corelis emailed the test vectors to our offshore facility and it was a beautiful thing to see the first board come off the line, pass the new vectors, and successfully boot and run.”

“From design change to board fabrication to assembly, the entire process was completed in less than a week, a fact which really impressed our management”, adds Bill Schimandle.

Corelis was able to provide support in 2Wire’s ASIC development program as well. When the first silicon was received from the vendor, the boundary scan vectors would not work. The ASIC vendor was unable to resolve the problem, so Corelis took the initiative in assigning an engineer to the project, who worked with the vendor and the manufacturer until the problem was resolved.

It turned out to be a problem with the vendors’ software, which made assumptions about the ordering of the chain of boundary scan cells. Corelis was able to point out some cells which were not boundary scan compliant, and this information was invaluable to the team designing the next generation ASIC.

“It has been an excellent business relationship,” concedes Bill Schimandle. “Corelis’ willingness to go the extra mile for their customers, both in training and in development, as well as allowing our team access to source code to tweak their toolsets for our custom environment; has played a major role in bringing our product to market within the time frame we committed to. I look forward to using Corelis on all of our future products.”

Smartbits Systems Dramatically Increases Production Yields
with use of Corelis'  ScanPlus Boundary-Scan Tester

Smartbits Systems, a  SPIRENT COMMUNICATIONS company, specializes in high-performance analysis and measurement systems for the networking industry, data service providers, and end-users worldwide.

“To achieve complex product functionality in small size packages, Smartbits Systems is developing and producing densely populated boards with many high-speed BGA parts,” said Surin Shaw, Test Engineering Manager at Smartbits Systems.

When previously testing Smartbits Systems’ densely populated boards, Mr. Shaw noticed an increasing failure rate and lower yields as the boards became more dense. In advance of new products and technologies where the migration of BGA components into the design was imminent, Smartbits Systems needed new tools to detect  shorts and opens underneath the BGA components. X-ray was one option but is not fully effective at detecting opens. At that point, Mr. Shaw decided to look for test methods that will find interconnect and other manufacturing defects prior to running the functional test. Considering various alternatives, boundary-scan appeared to be the right solution for these types of problems. 

Corelis was selected as one of the potential boundary-scan tool vendors and a careful analysis was done of the capabilities and ease-of-use of the available products for boundary-scan.  Corelis’ superb pre-sale support, the ease at which Corelis’ system handled tasks such as generating test vectors and subsequent committed technical support, convinced Mr. Shaw that Corelis was the vendor and partner of choice.

As Surin Shaw puts it, “The Corelis system saves a lot of time.  Tests are run in seconds saving hours of trouble-shooting.  Functional test only tells you that the board or device is dead.  Boundary-scan tells you where the fault is. The system also can tell if there is a missing resistor, as an open is created. We have been using Corelis’ boundary-scan testers for the last 10 new product releases and it has proven to be invaluable.”

“The results were above expectations.” Added Surin. “Interconnect and other production failures have been solved and moreover, boundary-scan methodology made the solution easy to implement.  With the volatility of the market that Smartbits System addresses with its products, it is essential that time-to-market be minimized and product quality be the highest possible.  With Corelis boundary-scan tools, Smartbits Systems found both a solution and a committed partner.”  

Mr. Shaw was so impressed with the added value of boundary-scan and Corelis’ ScanPlus boundary-scan test tools, that he is incorporating boundary-scan testability into all new product designs at Smartbits Systems. 

Daresbury Laboratory

Corelis' ScanPlus keeps Rapid2 on track

Corelis' boundary scan test tool ScanPlus finds manufacturing defects in complex high-speed data acquisition cards and enables scientific project to keep to schedule

• Months of extensive commissioning now no longer required

• Interconnect testing more than 32,000 PCB nets in seconds

• Automatic test pattern generation

Brackley, UK - 17th December 2001 - Engineers at Daresbury Laboratory are using Corelis' boundary scan tool, ScanPlus to validate the interconnect including memory interconnect between hundreds of ICs on a number of complex 19 inch (12U) data acquisition cards for the laboratory's Rapid2 project. The cards are 10- layer PCBs, populated both sides, and many of the components used are packaged in ball-grid-arrays (BGAs), making probe testing impossible.

By performing automated boundary scan tests ScanPlus can validate the PCB's interconnect (more than 32,000 nets connecting more than 1800 components) in a matter of seconds. This and ScanPlus' ability to marry boundary scan description language (BSDL) models of the card's components with the design's netlist, means comprehensive tests and programming files are created automatically.

Andy Hill, Systems Commissioner in Daresbury Laboratory's Instrumentation Department commented: "The data acquisition cards are extremely complex and, if they don't function correctly when they come back from manufacture, we can't 'buzz' them out because the majority of critical nets run between BGA packaged devices and never surface."

The Rapid2 project, set to acquire data from position sensitive X-ray detectors (used in scientific experiments) and due for completion in early 2002, ran into problems earlier this year when prototype cards failed to function correctly. As the engineers at Daresbury had no access to nets running between BGAs it was impossible to validate the interconnect.

"The data acquisition prototype cards implemented only a partial boundary scan chain," recalled Hill, "but this was used only to program the design's PLDs. When the prototypes came back from manufacture and didn't function correctly we suspected that the BGAs hadn't seated properly but had no way of proving it. We even X-rayed the devices but this told us little as, whilst it's possible to see the solder balls, you don't know for a fact that they're in good electrical contact with the PCB's pads."

Several weeks were spent during the summer of 2001 writing functional software to exercise parts of the prototypes, but - as Rapid2 requires 16 data acquisition cards - it soon became clear to the Instrumentation Department that they could not test all cards in this fashion and keep to the project's tight timescales. To this end, the ADC design was updated to include a full boundary scan chain. Hill: "This means that we can now effectively 'buzz' the cards out from within the devices on the cards and prove a) that all devices are present and correct and b) that the interconnect between components is electrically sound."

A number of boundary scan tool vendors and their solutions were assessed during the summer of 2001, but of these only Corelis promised the fastest solution and smoothest integration (with Daresbury's CAD tools).

Hill concluded: "Thanks to Corelis' ScanPlus system, and the ease with which it integrated with our CAD tools to automatically generate thorough and comprehensive boundary scan test patterns, the Rapid2 project is now back on schedule."