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For Immediate Release

Contact Information:
Steve Hartman
Product Marketing Manager
Corelis Inc.
(562) 926-6727 voice
(562) 404-6196 fax
steve@corelis.com

 

Corelis Unveils High-Speed PCI-Based JTAG / Boundary-Scan Test Controller Board
with Programmable Voltage Levels

New PCI JTAG / boundary-scan Controller provides high speed JTAG / boundary-scan testing
and support for low-voltage levels JTAG / boundary-scan architectures.

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Cerritos, CA, August 15, 1998 -- Corelis Inc. today unveiled a new high-performance JTAG / boundary-scan controller board for the PCI bus capable of supporting four independent JTAG ports with programmable voltage levels. The PCI-1149 controller was designed to support the widely used IEEE-1149.1 JTAG / boundary-scan test standard. Scan test vectors can be applied to up to four different scan chains using four independent JTAG ports. Additional 16 digital I/O lines, with software programmable voltage levels, are provided to connect to non-scannable nodes on the unit under test. The PCI-1149 JTAG ports are programmable from 2.0V to 3.4V in increments of 0.05V.

With the proliferation of the JTAG / boundary-scan test standard in electronics manufacturing, users are expanding the use of the boundary scan test logic beyond the scope of just interconnect testing. These new applications include CPLDs and Flash In-System Programming (ISP), functional device testing of ASIC’s using the INTEST scan capability as well as functional testing of non-scanable cluster logic on the unit under test. These forms of scan based testing usually require large test vector sets and tend to increase test execution times. The new Corelis controller is ideally suited for such applications due to its on-board memory and high-sustained TCK clock speed.

"With this new controller design, we are able to support very large scan chain lengths and TCK speeds of up to 25 MHz, thus greatly reducing test times" said Menachem Blasberg, president of Corelis Inc. "Our customers will be able to expand their use of the IEEE-1149.1 test standard and realize tremendous cost savings. This new controller is an important addition to our existing line of boundary scan controllers as we can offer our customers a wide selection of tester platforms, speeds and price points"

One unique feature of the PCI-1149.1 JTAG / boundary-scan controller is its RS-422 support for hierarchical multi-drop scan architectures. Using built in RS-422 differential line drivers and receivers, the JTAG / boundary-scan controller can be placed at a greater distance from the unit under test than would otherwise be possible.

Software to support the PCI-1149.1 is provided by the Corelis ScanPlus family of software products. These Windows 95/NT products offer Automatic Test Pattern Generation (ATPG), test execution and diagnostics for JTAG / boundary-scan based boards, and low-level Scan Function Library (SFL) for custom applications.

The PCI-1149 JTAG / boundary-scan controller requires a one half-size 32-bit PCI slot and comes bundled with the Scan Function Library and is available from stock.

Corelis is a world leader in the field of JTAG / boundary-scan JTAG testing, microprocessor development tools, and VXIbus test instruments. Corelis also provides various engineering services and is well known for its outstanding customer support.

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